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 PD - 9.1246C
IRF7404
HEXFET(R) Power MOSFET
l l l l l l l
Generation V Technology Ultra Low On-Resistance P-Channel Mosfet Surface Mount Available in Tape & Reel Dynamic dv/dt Rating Fast Switching
S
1
8 7
A D D D D
S
S G
2
VDSS = -20V
3
6
4
5
RDS(on) = 0.040
To p V ie w
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. The SO-8 has been modified through a customized leadframe for enhanced thermal characteristics and multiple-die capability making it ideal in a variety of power applications. With these improvements, multiple devices can be used in an application with dramatically reduced board space. The package is designed for vapor phase, infra red, or wave soldering techniques. Power dissipation of greater than 0.8W is possible in a typical PCB mount application.
S O -8
Absolute Maximum Ratings
Parameter
ID @ TA = 25C ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C VGS dv/dt TJ, TSTG 10 Sec. Pulsed Drain Current, VGS @ -4.5V Continuous Drain Current, VGS @ -4.5V Continuous Drain Current, VGS @ -4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
-7.7 -6.7 -5.4 -27 2.5 0.02 12 -5.0 -55 to + 150
Units
A
W W/C V V/ns C
Thermal Resistance Ratings
Parameter
RJA Maximum Junction-to-Ambient
Typ.
---
Max.
50
Units
C/W
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1
3/10/99
IRF7404
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Min. -20 --- --- --- -0.70 6.8 --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. Max. Units Conditions --- --- V VGS = 0V, ID = -250A -0.012 --- V/C Reference to 25C, ID = -1mA --- 0.040 VGS = -4.5V, ID = -3.2A --- 0.060 VGS = -2.7V, ID = -2.7A --- --- V V DS = VGS, ID = -250A --- --- S V DS = -15V, ID = -3.2A --- -1.0 VDS = -16V, VGS = 0V A --- -25 VDS = -16V, VGS = 0V, TJ = 125C --- -100 VGS = -12V nA --- 100 VGS = 12V --- 50 ID = -3.2A --- 5.5 nC VDS = -16V --- 21 VGS = -4.5V, See Fig. 6 and 12 14 --- VDD = -10V 32 --- ID = -3.2A ns 100 --- RG = 6.0 65 --- R D = 3.1, See Fig. 10
D
2.5 4.0
--- nH ---
Between lead tip and center of die contact VGS = 0V VDS = -15V = 1.0MHz, See Fig. 5
G
S
--- 1500 --- --- 730 --- --- 340 ---
pF
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units --- --- --- --- --- --- --- --- 69 71 -3.1 A -27 -1.0 100 110 V ns C
Conditions D MOSFET symbol showing the G integral reverse p-n junction diode. S TJ = 25C, IS = -2.0A, VGS = 0V TJ = 25C, I F = -3.2A di/dt = 100A/s
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%.
ISD -3.2A, di/dt -65A/s, VDD V(BR)DSS,
TJ 150C
Surface mounted on FR-4 board, t 10sec.
2
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IRF7404
1000
VGS - 7.5V - 5.0V - 4.0V - 3.5V - 3.0V - 2.5V - 2.0V BO TTOM - 1.5V TO P
1000
-I D , D rain -to-S ou rc e C urre nt (A )
-ID , D rain-to-S ourc e C urrent (A)
100
100
VGS - 7.5V - 5.0V - 4.0V - 3.5V - 3.0V - 2.5V - 2.0V BOTTOM - 1.5V TOP
10
10
-1.5 V
1
1
-1 .5 V
0.1 0.01
20 s P U L S E W ID TH TJ = 25 C A
0.1 1 10 100
0.1 0.01
20 s P U L S E W ID TH TJ = 15 0C
0.1 1 10
100
A
-V D S , D rain-to-S ourc e V oltage (V )
-VDS , D rain-to-S ource V oltage (V )
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
TJ = 2 5 C T J = 1 5 0 C
R D S (o n) , D rain-to-S ou rc e O n R es is tan c e (N orm aliz ed )
I D = -5 .3A
-I D , D ra in -to -Sou rce C u rren t (A )
1.5
10
1.0
0.5
1 1.5 2.0 2.5 3.0
V D S = -1 5 V 2 0 s P U L S E W ID TH
3.5 4.0 4.5 5.0
A
0.0 -60 -40 -20 0 20 40 60 80
V G S = -4.5 V
100 120 140 160
A
-V G S , G a te-to -S o u rce V o lta g e (V )
T J , J unc tion T em perature (C )
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRF7404
3000
-V G S , G ate-to-S ource V oltage (V )
V GS C is s C rs s C o ss
= = = =
0V , f = 1M H z C g s + C g d , Cd s S H O R T E D C gd C d s + C gd
10
I D = -3 .2 A V D S = -1 6V
8
C , Capacitance (pF)
2000
C iss
6
C o ss
4
1000
C rss
2
0 1 10 100
A
0 0 10 20 30
FO R TE S T C IR C U IT S E E FIG U R E 1 2
40 50 60
A
-VD S , D rain-to-S ourc e V oltage (V )
Q G , T otal G ate C harge (nC )
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
-I S D , R everse Drain C urrent (A )
OPERATION IN THIS AREA LIMITED BY RDS(on) TJ = 1 5 0C
10
T J = 2 5C
-I D , Drain Current (A) I
10
1ms
1
10ms
0.1 0.2 0.4 0.6 0.8 1.0 1.2
V G S = 0V
1.4 1.6
1 0.1
TA = 25 C TJ = 150 C Single Pulse
1 10 100
-V S D , S ource-to-D rain V oltage (V )
-VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF7404
8.0
V DS V GS
RD D .U .T .
A V + DD
-ID , Drain Current (A)
6.0
RG
-4 .5 V
4.0
P uls e W id th 1 s D u ty F a c to r 0 .1 %
Fig 10a. Switching Time Test Circuit
2.0
VDS 90%
0.0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Ambient Temperature
Fig 10b. Switching Time Waveforms
100
Thermal Response (Z thJA )
D = 0.50 0.20 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.01 0.1 1 10 100
10
0.1 0.0001
0.001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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5
IRF7404
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
QGS VG
QGD
VGS
-3mA
Charge
IG
ID
Current Sampling Resistors
Fig 12a. Basic Gate Charge Waveform
Fig 12b. Gate Charge Test Circuit
6
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+
D.U.T.
-
-4.5 V
VDS
IRF7404
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG VGS*
**
* dv/dt controlled by RG * ISD controlled by Duty Factor "D" * D.U.T. - Device Under Test
+ -
VDD
*
*
Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements
Driver Gate Drive P.W. Period D= P.W. Period VGS=10V
[
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
] ***
VDD
Re-Applied Voltage Inductor Curent
[
Body Diode Forward Drop
]
Ripple 5%
ISD
[
]
*** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 13. For P-Channel HEXFETS
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7
IRF7404
Package Outline
SO-8 Outline Dimensions are shown in millimeters (inches)
D -B-
DIM
5
INCHES MIN .0532 .0040 .014 .0075 .189 .150 MAX .0688 .0098 .018 .0098 .196 .157
MILLIMETERS MIN 1.35 0.10 0.36 0.19 4.80 3.81 MAX 1.75 0.25 0.46 0.25 4.98 3.99
A
6 5 H 0.25 (.010) M AM
5
8 E -A-
7
A1 B C D E
1
2
3
4
e 6X
K x 45 e1 A
e e1 H K L
.050 BASIC .025 BASIC .2284 .011 0.16 0 .2440 .019 .050 8
0.72 (.028 ) 8X
1.27 BASIC 0.635 BASIC 5.80 0.28 0.41 0 6.20 0.48 1.27 8
0.10 (.004) 6 C 8X
-CB 8X 0.25 (.010) NOTES: M A1 CASBS
L 8X
RECOMMENDED FOOTPRINT
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M-1982. 2. CONTROLLING DIMENSION : INCH. 3. DIMENSIONS ARE SHOWN IN MILLIMETERS (INCHES). 4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA. 5 6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS MOLD PROTRUSIONS NOT TO EXCEED 0.25 (.006). DIMENSIONS IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE.. 1.27 ( .050 ) 3X 6.46 ( .255 )
1.78 (.070) 8X
Part Marking Information
SO-8
E XA M P L E : T H IS IS A N IR F 7 10 1 D A T E C O D E (Y W W ) Y = L A S T D IG IT O F T H E Y E A R W W = W EEK XX XX W AFER LO T C O D E (LA S T 4 D IG IT S )
312 IN T E R N A T IO N A L R E C T IF IE R LOGO F7101
TOP
PART NUM BER
BO TTO M
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 http://www.irf.com/ Data and specifications subject to change without notice. 3/99
8
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